তোমার পুরো project এর সব assignments এক জায়গায়। Step-by-step guide, complete answers, Bangla + English explanations, interactive quizzes — everything you need to score A+ on the project.
Design a custom 32-bit ISA — operands, operations, instruction formats (R/I/J), register file, ISA table, benchmark programs, I/O operations, and MIPS comparison.
Complete MIPS assembly: MAX, MIN, MEAN with JAL/JR subroutines, divide by repeated subtraction, plus a simple assembler guide. No .data segment allowed.
Implement the complete single-cycle CPU in Verilog — ALU, Register File, Control Unit, JAL/JR, SRL/SLL, 7-step testing, and documentation.
These lectures provide the foundation you need for the assignments
ISA fundamentals, performance (CPI), design ideas → needed for Assignment 1
MIPS instructions, procedures (JAL/JR), registers → essential for Assignment 2
Single-cycle datapath, control signals → needed for Assignment 3 (CPU)
Verilog modules, gates, structural modeling → needed for Assignment 3 (CPU)